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SFN sells to the fabs by way of an infrastructure time machine ITM which includes the POR, PDK and LIB. The fab provides the fabless or fablight the PDK and LIB to enable new IC designs or can also provide a conversion service to take a CMOS gdsii and Veriog to produce a ZTL based gdsii.

SFN is releasing four ITMs: ITM180 which can deliver ZTL chips with the performance of 180nm CMOS using one micron equipment; ITM35 which enables 35nm CMOS-equivalent ICs to be made in 180nm process node fabs; ITM5 which enables 5nm CMOS performance from 28nm steppers, and ITMSubnm which means that current state-of-the-art 3nm fabs will be able to deliver incredible sub-nm Angstrom-level capabilities. VHDL is taken into the chosen ITM, which delivers both the POR (Process Of Reference) and the GDSii for the resultant IC to the fabs. The Infographic shows this process.

The compound combination of the Bizen wafer process, Zpolar Transistor and Zpolar Tunnel Logic ZTL creates the Infrastructure time machine ITM. See an article on how a fab can take advantge of the ITM Fab- using an Infrastructure Time Machine ITM.  

See an article of Bizen ZTL Bizen the results (ten years back to the future) ZTL vs CMOS

See an article covering the commercials of SFN Corporate Info

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SFNBizen

Process Of Reference

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The process of reference ‘POR’ defines the physics of the Bizen wafer process.

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SFNZpolar

Process Development Kit

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The process development kit, PDK, are the Bizen devices PDK including the Zpolar Transistor and tunnels.

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SFNZTL

Library Cells

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The Bizen cell libraries including the Zpolar Tunnel Logic (ZTL) family.